Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors

Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires. Realizations based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) have been proposed by the authors for the case of piezoresistive tactile sensors. The solution employing FPGAs is especially relevant since their performance is closer to that of Application Specific Integrated Circuits (ASICs) than that of the other devices. This paper presents an implementation of such an idea for a specific sensor. For the purpose of comparison, the circuitry based on the other devices is also made for the same sensor. This paper discusses the implementation issues, provides details regarding the design of the hardware based on the three devices and compares them

Improved Circuits with Capacitive Feedback for Readout Resistive Sensor Arrays

One of the most suitable ways of distributing a resistive sensor array for reading is an array with M rows and N columns. This allows reduced wiring and a certain degree of parallelism in the implementation, although it also introduces crosstalk effects. Several types of circuits can carry out the analogue-digital conversion of this type of sensors. This article focuses on the use of operational amplifiers with capacitive feedback and FPGAs for this task. Specifically, modifications of a previously reported circuit are proposed to reduce the errors due to the non-idealities of the amplifiers and the I/O drivers of the FPGA. Moreover, calibration algorithms are derived from the analysis of the proposed circuitry to reduce the crosstalk error and improve the accuracy. Finally, the performances of the proposals is evaluated experimentally on an array of resistors and for different ranges

Accuracy and Resolution Analysis of a Direct Resistive Sensor Array to FPGA Interface

Resistive sensor arrays are formed by a large number of individual sensors which are distributed in different ways. This paper proposes a direct connection between an FPGA and a resistive array distributed in M rows and N columns, without the need of analog-to-digital converters to obtain resistance values in the sensor and where the conditioning circuit is reduced to the use of a capacitor in each of the columns of the matrix. The circuit allows parallel measurements of the N resistors which form each of the rows of the array, eliminating the resistive crosstalk which is typical of these circuits. This is achieved by an addressing technique which does not require external elements to the FPGA. Although the typical resistive crosstalk between resistors which are measured simultaneously is eliminated, other elements that have an impact on the measurement of discharge times appear in the proposed architecture and, therefore, affect the uncertainty in resistance value measurements; these elements need to be studied. Finally, the performance of different calibration techniques is assessed experimentally on a discrete resistor array, obtaining for a new model of calibration, a maximum relative error of 0.066% in a range of resistor values which correspond to a tactile sensor

Proposal and Implementation of a Procedure for Compliance Recognition of Objects with Smart Tactile Sensors

This paper presents a procedure for classifying objects based on their compliance with information gathered using tactile sensors. Specifically, smart tactile sensors provide the raw moments of the tactile image when the object is squeezed and desqueezed. A set of simple parameters from moment-versus-time graphs are proposed as features, to build the input vector of a classifier. The extraction of these features was implemented in the field programmable gate array (FPGA) of a system on chip (SoC), while the classifier was implemented in its ARM core. Many different options were realized and analyzed, depending on their complexity and performance in terms of resource usage and accuracy of classification. A classification accuracy of over 94% was achieved for a set of 42 different classes. The proposed approach is intended for developing architectures with preprocessing on the embedded FPGA of smart tactile sensors, to obtain high performance in real-time complex robotic systems

Reducing Measurement Time in Direct Interface Circuits for Resistive Sensor Readout.

Direct Interface Circuits (DICs) carry out resistive sensor readings using a resistance-to-time-to-digital conversion without the need for analog-to-digital converters. The main advantage of this approach is the simplicity involved in designing a DIC, which only requires some additional resistors and a capacitor in order to perform the conversion. The main drawback is the time needed for this conversion, which is given by the sum of up to three capacitor charge times and their associated discharge times. This article presents a modification of the most widely used estimation method in a resistive DIC, which is known as the Two-Point Calibration Method (TPCM), in which a single additional programmable digital device pin in the DIC and one extra measurement in each discharge cycle, made without slowing down the cycle, allow charge times to be reduced more than 20-fold to values around 2 µs. The new method designed to achieve this reduction only penalizes relative errors with a small increase of between 0.2% and 0.3% for most values in the tested resistance range

Two-Capacitor Direct Interface Circuit for Resistive Sensor Measurements

Direct interface circuits (DICs) avoid the need for signal conditioning circuits and analog-to-digital converters (ADCs) to obtain digital measurements of resistive sensors using only a few passive elements. However, such simple hardware can lead to quantization errors when measuring small resistance values as well as high measurement times and uncertainties for high resistances. Different solutions to some of these problems have been presented in the literature over recent years, although the increased uncertainty in measurements at higher resistance values is a problem that has remained unaddressed. This article presents an economical hardware solution that only requires an extra capacitor to reduce this problem. The circuit is implemented with a field-programmable gate array (FPGA) as a programmable digital device. The new proposal significantly reduces the uncertainty in the time measurements. As a result, the high resistance errors decreased by up to 90%. The circuit requires three capacitor discharge cycles, as is needed in a classic DIC. Therefore, the time to estimate resistance increases slightly, between 2.7% and 4.6%.This work was funded by the Spanish Government and by the European ERDF program funds under contract TEC2015-67642-R.Ye

Fast Calibration Methods for Resistive Sensor Readout Based on Direct Interface Circuits.

A simple method to measure the resistance of a sensor and convert it into digital information in a programmable digital device is by using a direct interface circuit. This type of circuit deduces the value of the resistor based on the discharge time through it for a capacitor of a known value. Moreover, the discharge times of this capacitor should be measured through one or two resistors with known values in order to ensure that the estimate is not dependent on certain parameters that change with time, temperature, or aging. This can slow down the conversion speed, especially for high resistance values. To overcome this problem, we propose a modified process in which part of the discharge, which was previously performed through the resistive sensor only, is only conducted with the smallest calibration resistor. Two variants of this operation method, which differ in the reduction of the total time necessary for evaluation and in the uncertainty of the measurements, are presented. Experiments carried out with a field programmable gate array (FPGA); using these methodologies achieved reductions in the resistance conversion time of up to 55%. These reductions may imply an increase in the uncertainty of the measurements; however, the tests carried out show that with a suitable choice of parameters, the increases in uncertainty, and therefore errors, may be negligible compared to the direct interface circuits described in the literature

Smart Capture Modules for Direct Sensor-to-FPGA Interfaces

Direct sensor–digital device interfaces measure time dependent variables of simple circuits to implement analog-to-digital conversion. Field Programmable Gate Arrays (FPGAs) are devices whose hardware can be reconfigured to work in parallel. They usually do not have analog-to-digital converters, but have many general purpose I/O pins. Therefore, direct sensor-FPGA connection is a good choice in complex systems with many sensors because several capture modules can be implemented to perform parallel analog data acquisition. The possibility to work in parallel and with high frequency clock signals improves the bandwidth compared to sequential devices such as conventional microcontrollers. The price to pay is usually the resolution of measurements. This paper proposes capture modules implemented in an FPGA which are able to perform smart acquisition that filter noise and achieve high precision. A calibration technique is also proposed to improve accuracy. Resolutions of 12 effective number of bits are obtained for the reading of resistors in the range of an example piezoresistive tactile sensor

Quasi Single Point Calibration Method for High-Speed Measurements of Resistive Sensors.

Direct interface circuits are a simple, inexpensive alternative for the digital conversion of a sensor reading, and in some of these circuits only passive calibration elements are required in order to carry out this conversion. In the case of resistive sensors, the most accurate methods of calibration, namely two-point calibration method (TPCM) and fast calibration methods I and II (FCMs I and II), require two calibration resistors to estimate the value of a sensor. However, although FCMs I and II considerably reduce the time necessary to estimate the value of the sensor, this may still be excessive in certain applications, such as when making repetitive readings of a sensor or readings of a large series of sensors. For these situations, this paper proposes a series of calibration methods that decrease the mean estimation time. Some of the proposed methods are based on the TPCM and quasi single-point calibration methods, while others make the most of the advantages of FCM II and fast quasi single-point calibration methods. In general, the proposed methods significantly reduce estimation times in exchange for a small increase in errors. To validate the proposal, a circuit with a Xilinx XC3S50AN-4TQG144C FPGA has been designed and resistors in the range (267.56 Ω, 7464.5 Ω) have been measured. For 20 repetitive measurements, the proposed methods achieve time reductions of up to 61% with a relative error increase of only 0.1%